Re: Intel EtherExpress Pro/100B PCI

From: J Wunsch <j(at)uriah.heep.sax.de>
Date: Sat, 12 Jul 1997 08:56:23 +0200

As Stefan Esser wrote:

> > fxp0: warning: unsupported PHY, type = 7, addr = 1

> Schreib eine Mail an David Greenman <davidg(at)freebsd.org>, den Autor
> des Treibers, und gib ihm darin eine möglichst genaue Beschreibung
> der ICs auf der Karte.

Nee, probier lieber erst 2.2-STABLE.

> > Brauche ich einen anderen Treiber, wenn ja, wo finde ich den ?
>
> Nein, kein anderer Treiber, aber einen Patch.

Den Patch findest Du unten. Der Treiber sollte aber, wenn ich Davids
Aussage richtig im Ohr habe, auch mit einem unsupported PHY ordentlich
laufen, er kann dann nur kein full duplex.

Hier ist der Patch zwischen 2.2.2-RELEASE und 2.2-STABLE, der laut
commit message den i82555 PHY unterstützt:

Index: /sys/pci/if_fxp.c
===================================================================
RCS file: /home/cvs/src/sys/pci/if_fxp.c,v
retrieving revision 1.21.2.7
retrieving revision 1.21.2.8
diff -u -u -r1.21.2.7 -r1.21.2.8
--- if_fxp.c 1997/04/23 01:49:12 1.21.2.7
+++ if_fxp.c 1997/06/22 05:01:45 1.21.2.8
@@ -24,7 +24,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $Id: if_fxp.c,v 1.21.2.7 1997/04/23 01:49:12 davidg Exp $
+ * $Id: if_fxp.c,v 1.21.2.8 1997/06/22 05:01:45 davidg Exp $
  */
 
 /*
@@ -593,15 +593,14 @@
                                         txp->mb_head = NULL;
                                         sc->tx_queued--;
                                 }
- if (txp->cb_command & FXP_CB_COMMAND_S)
+ if (txp == sc->cbl_last)
                                         break;
                         }
                         sc->cbl_first = txp;
+ ifp->if_timer = 0;
                         /*
- * Clear watchdog timer. It may or may not be set
- * again in fxp_start().
+ * Try to start more packets transmitting.
                          */
- ifp->if_timer = 0;
                         if (ifp->if_snd.ifq_head != NULL)
                                 fxp_start(ifp);
                 }
@@ -961,15 +960,18 @@
         csr->scb_command = FXP_SCB_COMMAND_RU_START;
 
         /*
- * Toggle a few bits in the DP83840 PHY.
+ * Toggle a few bits in the PHY.
          */
- if (sc->phy_primary_device == FXP_PHY_DP83840 ||
- sc->phy_primary_device == FXP_PHY_DP83840A) {
+ switch (sc->phy_primary_device) {
+ case FXP_PHY_DP83840:
+ case FXP_PHY_DP83840A:
                 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR,
                     fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR) |
                     FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
                     FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
                     FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
+ /* fall through */
+ case FXP_PHY_82555:
                 /*
                  * If link0 is set, disable auto-negotiation and then:
                  * If link1 is unset = 10Mbps
@@ -981,19 +983,20 @@
                         int flags;
 
                         flags = (ifp->if_flags & IFF_LINK1) ?
- FXP_DP83840_BMCR_SPEED_100M : 0;
+ FXP_PHY_BMCR_SPEED_100M : 0;
                         flags |= (ifp->if_flags & IFF_LINK2) ?
- FXP_DP83840_BMCR_FULLDUPLEX : 0;
- fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_BMCR,
- (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_BMCR) &
- ~(FXP_DP83840_BMCR_AUTOEN | FXP_DP83840_BMCR_SPEED_100M |
- FXP_DP83840_BMCR_FULLDUPLEX)) | flags);
+ FXP_PHY_BMCR_FULLDUPLEX : 0;
+ fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
+ (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) &
+ ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
+ FXP_PHY_BMCR_FULLDUPLEX)) | flags);
                 } else {
- fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_BMCR,
- (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_BMCR) |
- FXP_DP83840_BMCR_AUTOEN));
+ fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
+ (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) |
+ FXP_PHY_BMCR_AUTOEN));
                 }
- } else {
+ break;
+ default:
                 printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n",
                      ifp->if_unit, sc->phy_primary_device, sc->phy_primary_addr);
         }
Index: /sys/pci/if_fxpreg.h
===================================================================
RCS file: /home/cvs/src/sys/pci/if_fxpreg.h,v
retrieving revision 1.3.2.3
retrieving revision 1.3.2.4
diff -u -u -r1.3.2.3 -r1.3.2.4
--- if_fxpreg.h 1997/03/21 08:01:52 1.3.2.3
+++ if_fxpreg.h 1997/06/22 05:01:46 1.3.2.4
@@ -24,7 +24,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $Id: if_fxpreg.h,v 1.3.2.3 1997/03/21 08:01:52 davidg Exp $
+ * $Id: if_fxpreg.h,v 1.3.2.4 1997/06/22 05:01:46 davidg Exp $
  */
 
 #define FXP_VENDORID_INTEL 0x8086
@@ -292,15 +292,16 @@
 #define FXP_PHY_DP83840 4
 #define FXP_PHY_80C240 5
 #define FXP_PHY_80C24 6
+#define FXP_PHY_82555 7
 #define FXP_PHY_DP83840A 10
 
 /*
- * DP84830 PHY, BMCR Basic Mode Control Register
+ * PHY BMCR Basic Mode Control Register
  */
-#define FXP_DP83840_BMCR 0x0
-#define FXP_DP83840_BMCR_FULLDUPLEX 0x0100
-#define FXP_DP83840_BMCR_AUTOEN 0x1000
-#define FXP_DP83840_BMCR_SPEED_100M 0x2000
+#define FXP_PHY_BMCR 0x0
+#define FXP_PHY_BMCR_FULLDUPLEX 0x0100
+#define FXP_PHY_BMCR_AUTOEN 0x1000
+#define FXP_PHY_BMCR_SPEED_100M 0x2000
 
 /*
  * DP84830 PHY, PCS Configuration Register

-- 
cheers, J"org
joerg_wunsch@uriah.heep.sax.de -- http://www.sax.de/~joerg/ -- NIC: JW11-RIPE
Never trust an operating system you don't have sources for. ;-)
Received on Sat 12 Jul 1997 - 09:27:38 CEST

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